Staff Power Intent Implementation Engineer

Job Title: Staff Power Intent Implementation Engineer (Chip Design Solutions)

Are you ready to revolutionize chip design?

Join a dynamic Solutions Engineering team as a Power Intent Engineer and play a pivotal role in shaping the future of semiconductor technology.

In this challenging and rewarding role, you'll be at the forefront of optimizing power consumption and performance for cutting-edge chip designs. You'll work closely with our implementation team to develop innovative methodologies and tools that drive industry-leading results.

Key Responsibilities:

• Develop and verify power intent for complex system-level designs and SoCs.
• Ensure accurate and efficient power management across a range of technology nodes.
• Collaborate with chip design partners to deliver successful physical implementation.
• Drive the development and deployment of new methodologies to improve implementation efficiency.
• Translate groundbreaking research concepts into tangible, real-world solutions.

Qualifications:

• Strong foundation in power management techniques and low-power design methodologies.
• Proficiency in UPF (Unified Power Format) and industry-standard EDA tools (Synopsys, Cadence, Siemens).
• Hands-on experience with low-power design techniques (clock/power gating, voltage/frequency scaling, retention).
• Excellent problem-solving, analytical, and logical reasoning skills.
• Proven ability to architect and implement new silicon implementation techniques.
• A passion for innovation and the ability to communicate complex ideas effectively.
• Strong programming skills in Tcl, Make, and Linux shell.

Interested to know more?

Apply here with your CV .

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